NVDC Vsys/Vbat question

Battery Management
1

Hi, I have a general question about something I’m struggling to understand. For battery charging ICs with a NVDC Power Path (e.g. the MP2733), I see there’s something called Vsys_min, then - separately - there’s a lower Vbatt_uvlo threshold.

Most datsheets I read say something like “the system voltage is regulated at Vsys_min”. But, is this ONLY when an input power adaptor (e.g. a USB connector) is present? And, if no adaptor is present, Vsys ‘follows’ the voltage of the battery (plus some offset)?

I guess what I’m trying to wrap my head around is the case when Vbatt falls below Vsys_min when no adaptor is present. Does the IC boost the Vbatt up to Vsys_min? Or does it continue to use the battery down to Vbatt_uvlo?

I don’t see anything in these datasheets that suggest boost behavior, but I also notice that the wording about Vsys_min is a little confusing (at least to me, who is new to learning about charging ICs).

Thanks for any insight!

2

Hello sb_mps,

There are some ics that will boost the battery voltage to Vsys.

Some options to look into for this would be MP2632B and MP2633.

3

Hi @eduardo.FAE, thank you! This isn’t actually my question though - I’m not in search of a specific part, but rather I am asking about NVDC power path management in general.

4

Hello sb_mps,
Looking at the functional block diagram the connection between the battery and System output has a fet. I believe Vsys min is only maintained at a higher voltage while charging. When there is no input voltage, I believe that it will simply be the battery voltage. Unless it is otherwise noted like the previous chargers I provided.

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