Hi, there are questions about layout
As SPEC shown in p.45 Figure 57 (Inner2 Layer), why the two nets are changed to Inner2 Layer?
That is, the nets connected to inductor are changed to Inner2 Layer.
Is that for reducing noise to other signals?
One is SW pin becuase is snesitive which needs short trace and away other signals
The other one is output voltage, ans this one I cannot figure ou why need to change to Inner2 Layer
Can I change the two nets to bottom for awaying other signals?