Hello,
We have worked out the current limiting using the CONSTANT_ CURRENT_LIMIT operation mentioned in the configuration table of the IC datasheet. However, we are seeing an offset of 300mA from the set current limit. Please refer to the test data attached below:
| Set Condition | Vout | Iout | Rout (Electronic load) | Current offset |
|---|---|---|---|---|
| 14V @ 3.2A [CC] | 11.5V | 3.06A | 3.75E | 200mA |
| 16V @ 3.6A [CC] | 14.16V | 3.42A | 4.13E | 200mA |
| 18V @ 3.9A [CC] | 14.68V | 3.70A | 3.97E | 200mA |
| 20V @ 4.3A [CC] | 16.77V | 4.06A | 4.13E | 300mA |
| 20V @ 4.6A [CC] | 17.68V | 4.33A | 4.08E | 300mA |
| 20V @ 5A [CC] | 19.16V | 4.69A | 4.08E | 300mA |
From test data, we observe that at higher output voltages the current limit offset increases (from 200 mA to 300 mA). At 20 V output with a 5 A current limit setting, the measured current is 4.7 A (300 mA offset).
The PCB layout has been implemented as per the datasheet guidelines. Could you please clarify if the observed current offset is due to a limitation of the IC or do you recommend any PCB layout optimization in the current sense section.
Thanks in advance for your help!