MPQ4242B and I2C Address Change

[bjoern.stumm]

Dear MPS Support Team,

We are currently evaluating the MPQ4242B in a system where multiple devices share a common I2C bus. To allow proper communication, each device is intended to receive a unique I2C address after startup.

According to the datasheet (MPQ4242BGVE-AEC1, Rev. 1.1), the I2C address can be configured via register CTL_SYS1 (0x1E, bits [3:0]). However, we are encountering an issue:

Problem:

After writing a new value into CTL_SYS1[3:0], the register does not retain the new value – it continues to read back as 0x01.
Moreover, the device remains only accessible at the default I2C address 0x61 (7-bit).
Attempts to communicate at the newly intended address (e.g. 0x66) fail.

Our Question:

Is there a defined or recommended method to make the new I2C address (set via CTL_SYS1) effective at runtime?

We are looking for a reliable way to change and apply the address dynamically, without power-cycling the device or performing any hardware-level resets.

Thank you very much in advance for your support!

Best regards,
Bjoern

[bjoern.stumm]

“Answers in 24 hours by MPS Engineers” - I think after 7 days, the 24 hours are finally over now…so here is the solution:

Solution: Enable the Digital Clock (CLK_ON)

The key lies in register:

CLK_ON (0x39)

Before modifying CTL_SYS1, you must enable the internal digital clock by writing 0x01 to address 0x39.

Datasheet Reference (Page 55):

“No I²C registers can be modified before the digital clock is enabled.”

This step is easy to miss but absolutely required.