The current delivered by the D1V0 is about 3A average but could be higher depending on the code running on the FPGA it powers but not more than 5A. D1V8 is 2A and since the D3V3INT is powering both the D1V0 and D1V8 converters the current would be ~2A for the D3V3INT. Well below the limits of either converter.
As I stated before, the D3V3INT rail works perfectly at the nominal 3.3V. This rail powers the 1V and 1.8V converters configured for external VCC as in fig 6 of the datasheet.
The issue is that I have to trim the 3.3V to 3.92V to get the 1V and 1.8V converters to start. Luckily I do not have any devices apart from a DDR3 sodimm that uses the 3.3V rail. The sodimm is currently not installed so I can get away with 3.92V on the 3.3V rail. However I would like to know what is wrong, my design or the datasheet.