For the MP8860 using I2C with 400kHz bus speed, we seem to require some time delay between reads/writes while this time delay is not required at 100kHz. What explains this, and if a time delay is required, how much to be safe? Does not seem to be in the datasheet. Thanks.
Hi Stan, can you share an I2C command log for these tests, or give more background on the test condition?
hi, Kareem,
We have one 50 µs delay before reading a register and all other delays removed. This seems to work. We have tried a shorter 10 µs delay and that is too short.
It looks like the problem occurs when reading the control registers ctl1 and ctl2, changing a bit and writing back to the register, then reading the register back to verify. Adding the delay before the confirmation read leads us to suspect it is the timing of the read right after the write as the issue.
Hi Stan, could you possibly provide some waveforms of the I2C transactions working with and without the delay? Will help us debug.