Hello,
I am developing a 3-phase BLDC motor controller using an RP2350 MCU and an MP6543A motor driver.
I am measuring the three motor phase currents using the MP6543A low-side current-sense outputs (SOA, SOB and SOC), connected to the RP2350 ADC.
For each current-sense output, I use:
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22 kΩ from SOx to VCC
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22 kΩ from SOx to GND
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100 pF capacitor on the ADC/current-sense signal
The motor current is relatively low, below approximately 0.5 A.
For this test, the motor phases are driven using triangular excitation signals, phase-shifted between the three phases.
The ADC is sampled at 500 kS/s. For each phase, I only retain the ADC samples acquired while the corresponding low-side MOSFET is enabled, and I use the median of these samples as the measured phase-current value for that PWM interval.
The attached plot shows the resulting 12-bit ADC readings for the three current-sense channels.
The zero-current level is approximately 2020 ADC counts.
The positive-current portions look smooth and consistent with the expected waveform. However, when the current becomes negative, the measured waveform is strongly distorted. On phases 1 and 2, the measured value even periodically drops all the way to zero.
This behavior is very repeatable and synchronized with the phase excitation.
I would like to understand whether this behavior is expected from the MP6543A low-side current-sense architecture.
In particular:
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Is the SOx output a valid representation of the phase current in both directions whenever the corresponding low-side MOSFET is enabled?
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During negative phase current / current recirculation, can the current flow through a path that is not sensed by SOx even though the low-side gate input is active?
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Is there a specific part of the low-side conduction interval in which SOA/SOB/SOC should be sampled? For example, should samples close to the switching edges be excluded?
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Is taking the median of the ADC samples acquired during the low-side ON interval a valid method for reconstructing the phase current, or is a more specific sampling strategy required?
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Could the automatic synchronous rectification of the MP6543A explain the strong difference between the positive and negative portions of the measured current?
I would also like to know whether the 22 kΩ / 22 kΩ bias network and 100 pF filtering are appropriate for this application.
Any recommendation regarding ADC synchronization with the MP6543A switching states would be very helpful.
Thank you.
