MP6527GF-Z HBENX Readback Remains 0 / Intermittent Half-Bridge Output Operation

Motor Drivers/Sensors
1

Dear MPS Technical Support,

We are currently developing a board using the MP6527GF-Z, and we are experiencing an intermittent issue with the half-bridge outputs.

Our board contains five MP6527GF-Z devices, and we have three assembled boards exhibiting the same type of behavior. The intended application is to use the half-bridge outputs as approximately 28 V / 110 mA drivers for relay coils. The relays are not currently connected during testing, so the outputs are presently operating essentially as unloaded 28 V buffer outputs.

The main issue is that some of the OUT pins intermittently do not respond to the commanded high/low state. The same device/output can sometimes operate correctly and sometimes remain inactive.

During debugging, we have verified the following:

  • 3.3 V VCC supply is present and stable.

  • VS1 and VS2 supplies are present at approximately 28 V and stable.

  • SPI signals have been checked and appear correct.

  • No PSF error is being reported.

  • The particularly interesting symptom is that SHBENX reads back as 0, indicating that the corresponding half-bridge is disabled / Hi-Z, even after writing HBENX = 1.

  • The problem is intermittent rather than being permanently associated with a particular output.

  • The relay loads are not connected during these tests.

  • We initially suspected an assembly issue. We have retouched the IC legs and have also removed and resoldered the MP6527 devices, but this has not resolved the problem.

  • The behavior has been observed across multiple MP6527 devices and multiple boards.

We have attached the relevant schematic showing the MP6527 circuits for your review.

Could you please advise on the following points?

  1. Is there any specific register configuration, initialization sequence, reset sequence, or timing requirement that must be followed before HBENX can be enabled?

  2. Under what conditions will the MP6527 force HBENX back to 0 or keep the half-bridge in Hi-Z?

  3. Are there any protection or diagnostic conditions other than PSF that can disable the half-bridge without producing an obvious PSF indication?

  4. Is there any required state of the input/control pins, EN/diagnostic signals, or SPI configuration during startup that could cause this behavior?

  5. Could you please confirm the expected SPI readback behavior for the SHBENX/HBENX register? In particular, should a successful write of HBENX = 1 always result in a readback of 1 when the half-bridge is enabled?

  6. Are there any known issues or errata associated with the MP6527GF-Z that could cause intermittent half-bridge enable or output operation?

  7. If possible, could you recommend a specific diagnostic procedure or set of register reads/writes that we can perform to determine why the bridge is remaining in Hi-Z?

We can provide SPI captures, oscilloscope waveforms, register dumps, and additional board-level measurements if required.

Since the same behavior has been observed on multiple ICs and boards, we would particularly appreciate guidance on the expected device state/register behavior and any conditions that can override the HBEN command.

Thank you for your support.

Best regards,
Anubhav Mukherjee