Thank you Brendan,
when you wrote " There may not be a delay switching modes when Vsys is already high" if VSYS is high this means that the system can work in two modes, charger with applied VIN or battery sourcing.
Let me try a reasoning, suppose the VIN is applied so the system is working in charging mode, hence Q1, Q2 are closed instead Q3 and Q4 are working as synchronous Buck DC-DC topology, now if the power supply is removed the system have to block Q1, Q3 should be act as a diode from SW to SYS and Q4 work as a switch to emulate a Boost DC-DC topology. To avoid any short between the SW side and the VIN side there must be a dead time, this should be investigated because has to be very small in order to avoid the need for big capacitor on the SYS output and then a possible temporary blackout on the SYS pin. Similary if VIN is put again the logic have to be reversed hence before Q1,Q2 get the VIN to SYS the Q3 and Q4 have to change the behavior, then some time is needed again to perform this operation and again a possible temporary blackout can be originated. Now the question is how long this time should be…
In order to perform some checking without the hardware is possible to use the MPSmart v8 in order to do some simulation?
I’ve also checked the MP2696A chip, this seems quite similar, from this forum (MP2696A switch over time) I can read that:
“After setting the BST_EN bit high and Vin drops below 2V, the device takes 3ms to switch from buck mode to boost mode.”
this can be a useful info, also I kindly ask you about the DM-DP output port if is possible avoid to use them and get the output directly on a power mosfet used as a switch to power on and off a load in a controlled manner. In other words the output can be opened or closed when the load have to be disconnected or connected upon some conditions.
Thanks for your help!