Hello MPS Technical Support Team,
I am incorporating the MP1918 driver into my design to drive a GaN Half-Bridge stage.
I would like to understand precisely what happens inside the device when the driver is powered off or without a supply voltage (a state where VCC is absent or equal to 0V).
I have a few questions regarding the behavior of the gate drive outputs (HGN/LGN) and the internal sink FETs:
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State of Internal Sink FETs: When the driver is completely off (VCC = 0V), what is the exact state of the internal sink FETs (connected to the HGN and LGN pins)? Are they in a low-impedance/conductive state or in an open/high-impedance state?
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Low Impedance / Short Circuit between VG and VS: When unpowered, does the driver guarantee a low-impedance path (short circuit) between the Gate and Source (VG to VS) of the external GaN FETs for both the High-Side and Low-Side?
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Internal Mechanism without Supply Voltage: If a short circuit / low-impedance path between VG and VS does occur while the driver is off, how is this achieved internally within the IC in the absence of an active VCC supply voltage to turn on the internal sink FET?
I would greatly appreciate your clarification on this topic.
Thank you in advance,