What is the Minimum voltage that can be produced by MPM3632S and what is the purpose of OUT_S pin?
The recommended min output operation range is 0.8V.
The OUT_S, is an output sensing pin. It is fed to a ramp compensation which compares with FB voltage. For proper/fast output control.
If this power module is powering an FPGA core rail which is having a 0.85 Volts, then can we route the OUT_S pins, near to the FPGA power plane to reduce the IR loss (current distribution) to get correct output voltage to the FPGA pins?
@MPSnow_Nouman Could you please look into this query? we are a little tight on the schedule. Kindly help here.
Thank you for your patience and escalating,
To clarify, are you asking whether you can connect directly to OUT_S?
You need a resistor between Vout and Vout_S.
The comparator integrated utilizes the FB and Vout_S signals.
Hi @MPSnow_Nouman ,
I am not asking about the resistor. If we are providing 0.85V to the regulator and due to the PCB trace loss, when the FPGA draws current, the voltage across the FPGA side will be dropped considerably, say 0.7V, which will cause an issue. To avoid this issue, can we route the OUT_S pins through a series resistor from the FPGA side, where the voltage drops. So that the regulator can sense that the voltage across the FPGA is reduced and accordingly the voltage will be increased to 0.85V at the FPGA side?
Yes, this should not cause an issue on the regulator side. Thank you for clarifying.