MIE1W0505BGLVH EMI Suppression

The datasheet for this part shows the isolated ground planes on 2 separate layers for the layout guidelines.

Is it okay from an EMI POV for them to be on the same layer with adequate clearance?

Also what is a suitable value for the Y-CAP? We’ve been having struggles with EMC at the 800MHz range for this IC

Hello Meter, welcome to the MPS Forums!

It is not recommended to have both GND planes of any isolated DC/DC system on the same layer.

Having these layers on the same layer even with clearance considerations would risk ground looping, possible radiation and conduction of noise, and in some cases can even risk isolation between your primary and secondary sides.

I would stick to the layout guidelines on this one.

As for the recommendations on Y-Caps, I would say anywhere between 4.7nF and 0.1uF would be suitable here.

Smaller values are better at minimizing leakage currents at the cost of less effective filtering.

Conversely, higher values will have a higher leakage at the benefit of providing better noise suppression and filtering capabilities.

Also remember to choose a Y-Cap that has a voltage rating higher than the max voltage that can be experienced in application to be safe. This includes potential unwarranted surge voltages.

Best,

Krishan

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The IC is on a 4 layer board that’s SIGNAL GND POWER SIGNAL. Separate layers would mean one of the ground planes goes in a power plane. Was just wondering if there were any risks associated with that as compared to putting them on the same layer with clearances

Hello again,

The layout guidelines above illustrate the two GND planes on their respective primary and secondary power planes, so that would be preferable.

However, you can also put one of your primary GND1 on the power plane and have the respective secondary GND2 plane dedicated to itself.

Best,

Krishan

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