A typical HR1001A design ends up with the voltage control opto coupler running at very low current and low VCE voltage.
If you choose a 220pF timing capacitor and CV frequency range of 75kHz to 140kHz (full load 110kHz),
You end up with about 1.7V on the opto VCE at a very low 42uA collector current.
You can increase opto current by increasing the timing cap and reducing the appropriate frequency setting resistors, but there are limits on both capacitor value and available current from the FSET pin.
Apart from measuring an opto gain (may vary wildly opto to opto, therfore is impractical), you have no idea what the opto gain is. Performance curves for typical optos do not categorise performance at such low current and voltage, plus noise immunity will be poor. Gain is normally detailed on opto specs at 5mA and 5V
So stability / performance cannot be predicted making design rather difficult.
It is possible to increase opto collector current with say a 5mA feed into the opto with a blocking diode. This should help with noise immunity, but you are still left with a similar problem of not knowing what the gain is at around 1 volt VCE.
Thoughts?